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Verilog ACC 子程序列表
为保证子程序的原汁原味，避免拉跨拙劣的翻译水平，所有子程序列表均保留英文说明。这里也没有对所有的子程序都进行验证，由于版本或抄写问题，可能会有所疏漏，欢迎指正。建议使用时再仔细研究对应类型的子程序，多多参考其他例子中参数的类型及设置。
ACC 子程序主要分为 5 大类：句柄（handle）、后继（next）、值变链接（VCL）、取值（fetch）、杂项（miscellaneous）、修改（modify）。
1. 句柄子程序
| 返回类型 | 调用格式及说明 |
|---|---|
| handle | ◆acc_handle_by_name(char *name, handle scope) |
| Get the handle to any named object based on its name and scope | |
| handle | ◆acc_handle_calling_mod_m() |
| Get a handle to the module containing the instance of the user-defined system task or function that called the PLI application. | |
| handle | ◆acc_handle_condition(handle object) |
| Get a handle to the conditional expression of a module path, data path, or timing check terminal | |
| handle | ◆acc_handle_conn(handle terminal) |
| Get the handle to the net connected to a primitive terminal, path terminal, or timing check terminal. | |
| handle | ◆acc_handle_datapath(handle modpath) |
| Get a handle to a data path for an edge-sensitive module path. | |
| handle | ◆acc_handle_hiconn(handle port) |
| Get the hierarchically higher net connection to a scalar module port or a bit-select of a vector port. | |
| handle | ◆acc_handle_interactive_scope() |
| Get a handle to the current interactive scope of the software tool. | |
| handle | ◆acc_handle_loconn(handle port) |
| Gets the hierarchically lower net connection to a scalar module port or a bit-select of a vector port. | |
| handle | ◆acc_handle_modpath(handle module, char *source, char *dest, handle source, handle dest) |
| Gets a handle to a module path whose source are specified. | |
| handle | ◆acc_handle_notifier(handle tchk) |
| Get the notifier reg associated with a particular timing check. | |
| handle | ◆acc_handle_object(char *name) |
| Get a handle for any named object. | |
| handle | ◆acc_handle_parent(handle object) |
| Get a handle for the parent primitive instance or module instance of an object. | |
| handle | ◆acc_handle_path(handle output, handle input) |
| Get a handle to an intermodule path that represents the connection from an output or inout port to an input or inout port. | |
| handle | ◆acc_handle_pathin(handle path) |
| Get a handle for the first net connected to a module path source. | |
| handle | ◆acc_handle_pathout(handle path) |
| Get a handle for the first net connected to a module path destination. | |
| handle | ◆acc_handle_port(handle module, int port_index) |
| Get a handle for a module port, based on the position of the port. | |
| handle | ◆acc_handle_scope(handle object) |
| Get a handle to the scope that contains an object. | |
| handle | ◆acc_handle_simulated_net(handle collapsed_net_handle) |
| Get the simulated net associated with the collapsed net passed as an argument. | |
| handle | ◆acc_handle_tchk(handle module, int tchk_type, char *conn_name1, int edge_type1, char *conn_name2, int edge_type2, handle conn_name1_handle, handle conn_name2_handle) |
| Get a handle for the specified timing check of a module (or cell). | |
| handle | ◆acc_handle_tchkarg1(handle tchk) |
| Get a handle for the timing check terminal connected to the first argument of a timing check. | |
| handle | ◆acc_handle_tchkarg2(handle tchk) |
| Get a handle for the timing check terminal connected to the second argument of a timing check. | |
| handle | ◆acc_handle_terminal(handle primitive, int terminal_index) |
| Get a handle for a primitive terminal based on the position of the primitive terminal. | |
| handle | ◆acc_handle_tfarg(int arg_num)◆acc_handle_itfarg(int arg_num, handle instance) |
| Get a handle for the specified argument of a user-defined system task or function that invokes the PLI routine. | |
| handle | ◆acc_handle_tfinst() |
| Get a handle to the current user-defined system task or function call. |
2. 后继子程序
| 返回类型 | 调用格式及说明 |
|---|---|
| handle | ◆acc_next(int object_type_array, handle reference, handle object) |
| Get handles to objects of each type specified in an array within the reference scope. | |
| handle | ◆acc_next_bit(handle reference, handle current_bit) |
| Get handles to bits in a port or expanded vector. | |
| handle | ◆acc_next_cell(handle reference, hand current_cell) |
| Get handles to cell instances within a region that includes the entire hierarchy below a module. | |
| handle | ◆acc_next_cell_load(handle reference, hand current_cell_load) |
| Get handles for cell loads on a net. | |
| handle | ◆acc_next_child(handle reference, handle current_child) |
| Get handles for children of a module. | |
| handle | ◆acc_next_driver(handle reference, handle current_driver) |
| Get handles to primitive terminals that drive a net. | |
| handle | ◆acc_next_hiconn(handle referenct, handle current_net) |
| Get handles for hierarchically higher net connections to a module port. | |
| handle | ◆acc_next_input (handle reference, handle current_terminal) |
| Get handles to input path terminals of a module path, source terminals of a data path, or the terminals of a timing check. | |
| handle | ◆acc_next_load(handle reference, handle current_load) |
| Get handles to primitive terminals driven by a net. | |
| handle | ◆acc_next_loconn(handle reference, handle current_net) |
| Get handles to hierarchically lower net connections to a port of a module. | |
| handle | ◆acc_next_modpath(handle reference, handle path) |
| Get handles to module paths of a module. | |
| handle | ◆acc_next_net(handle reference, handle curretn_net) |
| Get handles to nets in a module. | |
| handle | ◆acc_next_output(handle reference, handle current_terminal) |
| Get handles to output path terminals of a module path or data path. | |
| handle | ◆acc_next_parameter(handle reference, handle current_parameter) |
| Get handles to parameters within a module. | |
| handle | ◆acc_next_port(handle reference, handle current_port) |
| Gets handles to the ports of a module, or to ports which are connected to a given net or reg. | |
| handle | ◆acc_next_portout(handle reference, handle current_port) |
| Get handles to output or inout ports of a module. | |
| handle | ◆acc_next_primitive(handle reference, handle current_primitive) |
| Get handles to gates, switches, or user-defined primitives (UDPs) within a module. | |
| handle | ◆acc_next_scope(handle reference, handle current_scope) |
| Get handles to hierarchy scopes within a scope. | |
| handle | ◆acc_next_specparam(handle reference, handle current_specparam) |
| Get handles to specify block parameters within a module. | |
| handle | ◆acc_next_tchk(handle reference, handle timing_check) |
| Get handles to timing checks within a module. | |
| handle | ◆acc_next_terminal(handle reference, handle terminal) |
| Get handles to terminals of a gate, switch, or user-defined primitive. | |
| handle | ◆acc_next_topmod(handle top_module) |
| Get handles to top-level modules. |
3. 值变链接子程序
| 返回类型 | 调用格式及说明 |
|---|---|
| void | ◆acc_vcl_add(handle object, C_function unquoted name, char *user_data, int vcl_flag) |
| Set a callback to a consumer routine with value change information whenever an object changes value.consumer_routine() is the unquoted name of a C function to be called. | |
| void | ◆acc_vcl_delete(handle object, C_function consumer_routine() , char *user_data, int vcl_flag) |
| Removes a VCL callback monitor.consumer_routine() is the unquoted name of a C function to be called. |
4. 取值子程序
| 返回类型 | 调用格式及说明 |
|---|---|
| int | ◆acc_fetch_argc() |
| Get the number of command-line arguments supplied with a Verilog software tool invocation. | |
| char * | ◆acc_fetch_argv() |
| Get an array of character pointers that make up the command-line arguments for a Verilog software product invocation. | |
| double | ◆acc_fetch_attribute(handle object, char *attribute, double default) |
| Get the value of a parameter or specparam named as an attribute in the Verilog source description. | |
| int | ◆acc_fetch_attribute_int(handle object, char *attribute, int default) |
| Get the integer value of a parameter or specparam named as an attribute in the Verilog source description. | |
| char * | ◆acc_fetch_attribute_str(handle object, char *attribute, char *default) |
| Get the value of a parameter or specparam named as an attribute in the Verilog source description. | |
| char * | ◆acc_fetch_defname(handle object) |
| Get the definition name of a module instance or primitive instance. | |
| int | ◆acc_fetch_delay_mode(handle module) |
| Get the delay mode of a module instance. | |
| int | ◆acc_fetch_delays(handle object, double *rise_delay, double *fall_delay, double *trunoff_delay)◆acc_fetch_delays(handle object, double *rise_delay, double *d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12) |
| Get existing delays for primitives, module paths, timing checks, module input ports, and intermodule paths. | |
| int | ◆acc_fetch_direction(handle object) |
| Get the direction of a port or terminal | |
| int | ◆acc_fetch_edge(handle pathio) |
| Get the edge specifier of a module path or timing check terminal. | |
| char * | ◆acc_fetch_fullname(handle object) |
| Get the full hierarchical name of any named object or module path. | |
| int | ◆acc_fetch_fulltype(handle object) |
| Get the fulltype of an object. | |
| int | ◆acc_fetch_index(handle object) |
| Get the index number for a port or terminal. | |
| int | ◆acc_fetch_location(p_location loc_p, handle object) |
| Get the location of an object in a Verilog-HDL source file.p_location is a data structure, defined in acc_user.h. | |
| char * | ◆acc_fetch_name(handle object) |
| Get the instance name of any named object or module path. | |
| int | ◆acc_fetch_paramtype(handle parameter) |
| Get the data type of a parameter or specparam. | |
| double | ◆acc_fetch_paramval(handle parameter) |
| Get the value of a parameter or specparam. | |
| int | ◆acc_fetch_polarity(handle path) |
| Get the polarity of a path. | |
| int | ◆acc_fetch_precision() |
| Get the smallest time precision argument specified in all `timescale compiler directives in a given design. | |
| int | ◆acc_fetch_pulsere(handle object, double *r1, double *e1, double *r2, double *e2, ......, double *r12, double *e12) |
| Get current pulse handling reject_limit and e_limit for a module path, intermodule path or module input port. | |
| int | ◆acc_fetch_range(handle vector, int *msb, int *lsb) |
| Get the most significant bit and least significant bit range values for a vector. | |
| int | ◆acc_fetch_size(handle object) |
| Get the bit size of a net, reg, integer, time, real or port. | |
| double | ◆acc_fetch_tfarg(int arg_number)◆acc_fetch_itfarg(int arg_number, handle tfinst) |
| Get the value of the specified argument of the system task or function associated with the PLI application; the value is returned as a double-precision number | |
| int | ◆acc_fetch_tfarg_int(int arg_number)◆acc_fetch_itfarg_int(int arg_number, handle tfinst) |
| Get the value of the specified argument of the system task or function associated with the PLI application; the value is returned as an integer number. | |
| char * | ◆acc_fetch_tfarg_str(int arg_number)◆acc_fetch_itfarg_str(int arg_number, handle tfinst) |
| Get the value of the specified argument of the system task or function associated with the PLI application; the value is returned as a pointer to a character string. | |
| void | ◆acc_fetch_timescale_info(handle object, p_timescale_info timescale_p) |
| Get timescale information for an object or for an active $timeformat system task invocation.p_timescale_info is a data structure, defined in acc_user.h. | |
| int | ◆acc_fetch_type(handle object) |
| Get the type of an object. | |
| char * | ◆acc_fetch_type_str(int type) |
| Get a string that indicates the type of its argument. | |
| char * | ◆acc_fetch_value(handle object, char *format, s_acc_value *value) |
| Get the logic or strength value of a net, reg, or variables_acc_value is a data structure, defined in acc_user.h. |
5. 杂项子程序
| 返回类型 | 调用格式及说明 |
|---|---|
| void | ◆acc_close() |
| Free internal memory used by ACC routines; reset all configuration parameters to default values. | |
| handle * | ◆acc_collect(handle *next_routine, handle object, int num_of_objects) |
| Obtain an array of handles for all objects related to a particular reference object; get the number of objects collected. | |
| int | ◆acc_compare_handles(handle object1, handle object2) |
| Determine if two handles refer to the same object. | |
| int | ◆acc_configure(int config_param, char *config_value) |
| Set parameters that control the operation of various ACC routines. | |
| int | ◆acc_count(handle *next_routine, handle object) |
| Count the number of objects related to a particular reference object. | |
| int | ◆acc_initialize() |
| Initializes the environment for ACC routines. | |
| int | ◆acc_object_in_typelist(handle object, int object_type_array[]) |
| Determine whether an object fits a type or fulltype, or special property, as specified in an input array. | |
| int | ◆acc_object_of_type(handle object, int object_type) |
| Determine whether an object fits a specified type or fulltype, or special property. | |
| int | ◆acc_product_type() |
| Get the software product type that is calling the PLI application. | |
| char * | ◆acc_product_version() |
| Get the version of the software product that is linked to the ACC routines. | |
| int | ◆acc_release_object(handle object) |
| Deallocate memory allocated by calls to acc_next_input() and acc_next_output(). | |
| void | ◆acc_reset_buffer() |
| Reset the string buffer to the beginning. | |
| handle | ◆acc_set_interactive_scope(handle scope, int callback_flag) |
| Set the interactive scope of a software tool. | |
| char* | ◆acc_set_scope(handle module, char *module_name) |
| Set a scope for acc_handle_object() to use when searching in the design hierarchy. | |
| char * | ◆acc_version() |
| Get a pointer to a character string that indicates version number of the ACC routine software. |
6. 修改子程序
| 返回类型 | 调用格式及说明 |
|---|---|
| int | ◆acc_append_delays(handle object, double *rise_delay, double *fall_delay, double *trunoff_delay)◆acc_append_delays(handle object, double *d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12)◆acc_append_delays(handle object, double limit) |
| Add delays to existing delay on primitives, module paths, intermodule paths, timing checks, and module input ports. | |
| int | ◆acc_append_pulsere(handle object, double *r1, double *e1, double *r2, double *e2, ......, double *r12, double *e12) |
| Add delays to existing pulse handling reject_limit and e_limit for a module path, intermodule path or module input port. | |
| int | ◆acc_release_object(handle object) |
| Deallocate memory allocated by calls to acc_next_input() and acc_next_output(). | |
| int | ◆acc_replace_delays(handle object, double *rise_delay, double *fall_delay, double *trunoff_delay)◆acc_replace_delays(handle object, double *d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12)◆acc_replace_delays(handle object, double limit) |
| Replace existing delays for primitives, module paths, timing checks, module input ports, and inter-module paths. | |
| int | ◆acc_replace_pulsere(handle object, double *r1, double *e1, double *r2, double *e2, ......, double *r12, double *e12) |
| Replace existing pulse handling reject_limit and e_limit for a module path, intermodule path or module input port. | |
| int | ◆acc_set_pulsere(handle path, double reject_percentage, double e_percentage) |
| Set the pulse handling values for a module path, intermodule path or module input port as a percentage of the delay. | |
| int | ◆acc_set_value(handle object, p_setval_value value_p, p_setval_delay delay_p) |
| Set and propagate a value on a reg, variable, user-defined system function or a sequential UDP; procedurally assign a reg or variable; force a reg, variable, or net.p_setval_value and p_setval_delay are data structure, defined in acc_user.h. |
7. 结构体
下面对 ACC 子程序设计的一些结构体进行说明。
| 涉及的函数 | 结构体 |
|---|---|
| acc_fetch_location | typedef struct t_location{PLI_INT32 line_no;PLI_BYTE8 *filename;} s_location, *p_location; |
| p_timescale_info | typedef struct t_timescale_info{PLI_INT16 unit;PLI_INT16 precision;} s_timescale_info, *p_timescale_info; |
| acc_fetch_valueacc_set_value | typedef struct t_setval_value{PLI_INT32 format;union{PLI_BYTE8 *str;PLI_INT32 scalar;PLI_INT32 integer;double real;p_acc_vecval vector;} value;} s_setval_value, *p_setval_value, s_acc_value, *p_acc_value; |
| acc_set_value | typedef struct t_setval_delay{s_acc_time time;PLI_INT32 model;} s_setval_delay, *p_setval_delay; |
下一章：Verilog 逻辑综合
本教程经常有提及综合这个词语。或者说有些逻辑不能综合成实际电路，或者说有些逻辑设计综合后的电路会有一些安全隐患。本章就简单介绍下逻辑综合的相关知识，仅从理论层次和普遍认知的角度来阐述。待那个懵懂求知少年变成中年秃顶 ...